PowerLattice, a startup founded in 2023 by veteran electrical engineers from Qualcomm, NUVIA, and Intel, has emerged from stealth with a bold claim: a groundbreaking chiplet technology capable of reducing computer chip power consumption by over 50%. This significant development comes as the company announced a $25 million Series A funding round, led by Playground Global and Celesta Capital, bringing its total funding to $31 million. The investment highlights the urgent need for energy-efficient solutions in the semiconductor industry, particularly with the escalating demands of artificial intelligence.
The urgency for such innovation is clear. As major tech companies grapple with the immense compute capacity required for large language models and other AI products, the energy footprint of data centers continues to grow. Against this backdrop, energy efficiency has become a critical priority for semiconductor manufacturers worldwide.
Ex-Intel CEO Pat Gelsinger's Strong Endorsement
A major stamp of approval for PowerLattice comes from Pat Gelsinger, former CEO of Intel and currently a general partner at Playground Global. Gelsinger, a highly respected figure in the semiconductor world, expressed strong confidence in the startup's team and technology.
“This is the hard stuff: How do you get power into the device? There are very few teams and people that can do it,” said Gelsinger. “We have assembled what I’d argue is the dream team of power delivery.”
The admiration appears to be mutual. PowerLattice CEO Dr. Peng Zou and his founding team were reportedly "star-struck" by Gelsinger during their pitch at Playground’s offices in March, even asking him for a selfie. Gelsinger, in turn, was genuinely impressed by PowerLattice’s innovative approach.
The Power-Saving Chiplet Technology
At its core, PowerLattice’s technology is conceptually straightforward yet highly impactful: a tiny power delivery chiplet designed to bring power significantly closer to the processor. This proximity dramatically minimizes energy loss, leading to the claimed power savings.
Just two years since its inception, PowerLattice has already achieved a crucial milestone. Its first batch of chiplets is currently being produced by TSMC, in collaboration with an unnamed manufacturer that is actively testing the startup's functionality, according to Gelsinger.
Future Outlook and Competitive Landscape
Beyond its initial customer, PowerLattice plans to make its product available for testing by other potential clients in the first half of 2026. This customer base includes major chip manufacturers like Nvidia, Broadcom, and AMD, as well as specialized AI chip developers such as Cerberus, Grok, and Playground-backed startups d-Matrix and NextSilicon.
While every chip company has internal teams dedicated to improving energy efficiency, Gelsinger believes PowerLattice’s innovative approach will capture significant interest.
“They may say, ‘I’m going to take some volume to this approach, some volume to my more traditional approach’,” he noted. “But we think our ability to capture meaningful share will quickly emerge.”
PowerLattice is not alone in tackling the semiconductor industry’s energy challenge. It faces competition from companies like Empower Semiconductor, which recently secured a substantial $140 million Series D funding round led by Fidelity Management & Research Company in September.
However, Gelsinger remains confident, describing PowerLattice’s 50% energy efficiency gain as an “extraordinary” result. He anticipates the company will soon raise an even larger funding round to scale up its production capabilities.
“The idea is bold, the benefits are large, and I expect others will be saying, ‘That’s a great idea. Let me try as well’,” Gelsinger concluded.
